From First Principles

You can’t judge us according to logic. You accountants! You have to understand! You can only judge us according to the laws of religion. Faith! Our faith will make you jealous! What greatness do you have in your life? You have nothing. Just comfort.

George Boole

A computer scientist just won the Nobel Prize for physics. Geoffrey Hinton. It's undeniable he's a genius, the question is whether he's a physicist. If you asked me that question before the Nobel Committee made their decision, I would probably be very confused. After all it seems obvious Hinton is a computer scientist.

Even he was 'flabbergasted' upon hearing the news, half awake in california. 'flabbergasted' Generally the same reaction most people had, after all the Turning prize exists, why didn't they just give him that?

Accounting

The computer starts with the logic gate. A gate is a physical device which implements boolean logic. There are many hardware implementations: optical, hydraulic, pneumatic etc. We personally use electricity - etching transistors into silicon. The primitive gates AND/OR/NOT can be used to implement any boolean function. Designing these composite gates isn't our problem, instead that's left to hardware designers. In producing chips, hardware designers use HDL (Hardware Description Language). A tool which allows for testing and simulation of proposed chip designs.

HDL consists of a header section and a section. The former specifies the following information: Chip Name and # of input/output pins, whereas the latter describes the name and topology of all lower-level parts. This is an example of an HDL program:

/* And gate:
If a=1 and b=1, out=1 else out=0. */
CHIP And {
    IN a, b;
    OUT out;
    PARTS:
    And(a=a, b=b, out=out);
}

Instead of a compiler to run this code, we use a hardware simulator. This generates an output file which is consistent with the AND truth table. A | B | A AND B
---+---+---------
0 | 0 |    0
0 | 1 |    0
1 | 0 |    0
1 | 1 |    1 All we really require is a NAND gate in constructing any "elementary" logic gate. In actually implementing a logic gate in a real HDL, we'll use Verilog.

module AND_gate_b(a,b,y);
input a,b;
output y;

always @ (a,b)
y = a & b;

endmodule

A multiplexor is a gate with three inputs. 2 "data bits" and a single "selection bit". The selection bit decided which of the two inputs (data bits) to output. The opposite is a demultiplexor which takes a single input and channels it into two possible outputs depending on the selection bit.

Multiplexor
[IF S = 0 - OUTPUT = I0, if S = 1 - OUTPUT = I1]

 S | I0 | I1 | O
---+----+----+---
 0 |  0 |  0 | 0
 0 |  0 |  1 | 0
 0 |  1 |  0 | 1
 0 |  1 |  1 | 1
 1 |  0 |  0 | 0
 1 |  0 |  1 | 1
 1 |  1 |  0 | 0
 1 |  1 |  1 | 1

Demultiplexor

 S | D  | O0 | O1
---+----+----+----
 0 |  0 |  0 |  0
 0 |  1 |  1 |  0
 1 |  0 |  0 |  0
 1 |  1 |  0 |  1


            

Computer hardware generally functions on multi-bit arrays dubbed "buses". A 32-bit computer should be able to compute, bit-wise, and AND function on two 32-bit buses.